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philips semiconductors product specification logic level topfet buk114-50l/s smd version of buk104-50l/s description quick reference data monolithic temperature and symbol parameter max. unit overload protected logic level power mosfet in a 5 pin surface v ds continuous drain source voltage 50 v mounting plastic envelope, intended i d continuous drain current 15 a as a general purpose switch for p tot total power dissipation 40 w automotive systems and other t j continuous junction temperature 150 ?c applications. r ds(on) drain-source on-state resistance v is = 5 v 125 m w applications v is = 7 v 100 m w general controller for driving symbol parameter nom. unit lamps motors v psn protection supply voltage solenoids buk114-50l 5v heaters BUK114-50S 10 v features functional block diagram vertical power dmos output stage low on-state resistance logic and protection supply from separate pin low operating supply current overload protection against over temperature overload protection against short circuit load latched overload protection reset by protection supply protection circuit condition indicated by flag pin 5 v logic compatible input level separate input pin for higher frequency drive esd protection on input, flag and protection supply pins over voltage clamping for turn off of inductive loads both linear and switching operation are possible fig.1. elements of the topfet. pinning - sot426 pin configuration symbol pin description 1 input 2 flag 3 (connected to mb) 4 protection supply 5 source fig. 2. fig. 3. mb drain power mosfet drain source input o/v clamp logic and protection protection supply flag mb 12 45 3 d s i topfet p f p september 1996 1 rev 1.000
philips semiconductors product specification logic level topfet buk114-50l/s smd version of buk104-50l/s limiting values limiting values in accordance with the absolute maximum rating system (iec 134) symbol parameter conditions min. max. unit voltages v dss continuous off-state drain source v is = 0 v - 50 v voltage 1 v is continuous input voltage - 0 11 v v fs continuous flag voltage - 0 11 v v ps continuous supply voltage - 0 11 v currents v is = - 7 5 v i d continuous drain current t mb 25 ?c - 15 13 a i d continuous drain current t mb 100 ?c - 9.5 8.5 a i drm repetitive peak on-state drain current t mb 25 ?c - 60 54 a thermal p tot total power dissipation t mb = 25 ?c - 40 w t stg storage temperature - -55 150 ?c t j junction temperature 2 continuous - 150 ?c t sold lead temperature during soldering - 250 ?c overload protection limiting values with the protection supply an n-mos transistor turns on for internal overload protection to connected, topfet can protect between the input and source to remain latched while the control itself from two types of overload - quickly discharge the power circuit is high, external series input over temperature and short circuit mosfet gate capacitance. resistance must be provided. refer load. to input characteristics. symbol parameter conditions min. max. unit v is =75 - v v psp protection supply voltage 3 for valid protection buk114-50l 4.4 4 - v BUK114-50S 5.4 5 - v over temperature protection v ps = v psn v ddp(t) protected drain source supply voltage v is = 10 v; r i 3 2 k w -50v v is = 5 v; r i 3 1 k w -50v short circuit load protection v ps = v psn ; l 10 m h v ddp(p) protected drain source supply voltage 4 v is = 10 v; r i 3 2 k w -25v v is = 5 v; r i 3 1 k w -45v p dsm instantaneous overload dissipation - 0.8 kw esd limiting value symbol parameter conditions min. max. unit v c electrostatic discharge capacitor human body model; - 2 kv voltage c = 250 pf; r = 1.5 k w 1 prior to the onset of overvoltage clamping. for voltages above this value, safe operation is limited by the overvoltage clampi ng energy. 2 a higher t j is allowed as an overload condition but at the threshold t j(to) the over temperature trip operates to protect the switch. 3 the minimum supply voltage required for correct operation of the overload protection circuits. 4 the device is able to self-protect against a short circuit load providing the drain-source supply voltage does not exceed v ddp(p) maximum. for further information, refer to overload protection characteristics. september 1996 2 rev 1.000
philips semiconductors product specification logic level topfet buk114-50l/s smd version of buk104-50l/s overvoltage clamping limiting values at a drain source voltage above 50 v the power mosfet is actively turned on to clamp overvoltage transients. symbol parameter conditions min. max. unit i drrm repetitive peak clamping drain current r is 3 100 w 1 -15a e dsm non-repetitive inductive turn-off i dm = 15 a; r is 3 100 w - 200 mj energy 2 e drm repetitive inductive turn-off energy r is 3 100 w ; t mb 95 ?c; - 20 mj i dm = 4 a; v dd 20 v; f = 250 hz i dirm repetitive peak drain to input current 3 r is = 0 w ; t p 1 ms - 50 ma reverse diode limiting value symbol parameter conditions min. max. unit i s continuous forward current t mb = 25 ?c; - 15 a v is = v ps = v fs = 0 v thermal characteristic symbol parameter conditions min. typ. max. unit thermal resistance r th j-mb junction to mounting base - - 2.5 3.1 k/w static characteristics t mb = 25 ?c unless otherwise specified symbol parameter conditions min. typ. max. unit v (cl)dsr drain-source clamping voltage r is = 100 w ; i d = 10 ma 50 - 65 v v (cl)dsr drain-source clamping voltage r is = 100 w ; i dm = 1 a; t p 300 m s; 50 - 70 v d 0.01 i dss zero input voltage drain current v ds = 12 v; v is = 0 v - 0.5 10 m a i dsr drain source leakage current v ds = 50 v; r is = 100 w ;-120 m a i dsr drain source leakage current v ds = 40 v; r is = 100 w ; t j = 125 ?c - 10 100 m a r ds(on) drain-source on-state i dm = 7.5 a; v is = 7 v - 75 100 m w resistance t p 300 m s; d 0.01 v is = 5 v - 95 125 m w 1 the input pin must be connected to the source pin by a specified external resistance to allow the power mosfet gate source volt age to become sufficiently positive for active clamping. refer to input characteristics. 2 while the protection supply voltage is connected, during overvoltage clamping it is possible that the overload protection may o perate at energies close to the limiting value. refer to overload protection characteristics. 3 shorting the input to source with low resistance inhibits the internal overvoltage protection by preventing the power mosfet ga te source voltage becoming positive. september 1996 3 rev 1.000
philips semiconductors product specification logic level topfet buk114-50l/s smd version of buk104-50l/s overload protection characteristics with adequate protection supply provided there is adequate input refer also to overload voltage topfet detects when one series resistance it switches off protection limiting values of the overload thresholds is and remains latched off until reset and input characteristics. exceeded. by the protection supply pin. symbol parameter conditions min. typ. max. unit short circuit load protection 1 v ps = v psn 2 ; t mb = 25 ?c; l 10 m h; r i 3 2 k w e ds(to) overload threshold energy v dd = 13 v; v is = 10 v - 150 - mj t d sc response time v dd = 13 v; v is = 10 v - 375 - m s over temperature protection v ps = v psn ; r i 3 2 k w t j(to) threshold junction temperature from i d 3 0.65 a 3 150 - - ?c transfer characteristics t mb = 25 ?c symbol parameter conditions min. typ. max. unit g fs forward transconductance v ds = 10 v; i dm = 7.5 a t p 300 m s; 5 9 - s d 0.01 i d drain current 4 v ds = 13 v; v is = 5 v - 25 - a v is = 10 v 40 - a protection supply characteristics t mb = 25 ?c unless otherwise specified symbol parameter conditions min. typ. max. unit protection supply i ps , protection supply current normal operation or i psl protection latched buk114-50l v ps = 5 v - 0.2 0.35 ma BUK114-50S v ps = 10 v - 0.4 1.0 ma v psr protection reset voltage 5 1.5 2.5 3.5 v t j = 150 ?c 1.0 - - v v (cl)ps protection clamp voltage i p = 1.35 ma 11 13 - v reverse diode characteristics t mb = 25 ?c symbol parameter conditions min. typ. max. unit v sds forward voltage i s = 15 a; v is = v ps = v fs = 0 v; - 1.0 1.5 v t p = 300 m s t rr reverse recovery time not applicable 6 ---- 1 the short circuit load protection is able to save the device providing the instantaneous on-state dissipation is less than the limiting value for p dsm , which is always the case when v ds is less than v dsp maximum. 2 at the appropriate nominal protection supply voltage for each type. refer to quick reference data. 3 the over temperature protection feature requires a minimum on-state drain source voltage for correct operation. the specified minimum i d ensures this condition. 4 during overload condition. refer also to overload protection limiting values and characteristics. 5 the supply voltage below which the overload protection circuits will be reset. 6 the reverse diode of this type is not intended for applications requiring fast reverse recovery. september 1996 4 rev 1.000
philips semiconductors product specification logic level topfet buk114-50l/s smd version of buk104-50l/s input characteristics t mb = 25 ?c unless otherwise specified symbol parameter conditions min. typ. max. unit normal operation v is(to) input threshold voltage v ds = 5 v; i d = 1 ma 1.0 1.5 2.0 v t mb = 150 ?c 0.5 - - v i is input current v is = 10 v - 10 100 na v (cl)is input clamp voltage i i = 1 ma 11 13 - v overload protection latched r isl input resistance 1 v ps = 5 v i i = 5 ma; - 55 - w t mb = 150 ?c - 95 - w v ps = 10 v i i = 5 ma; - 35 - w t mb = 150 ?c - 60 - w application information external input resistances for (see figure 29) r is internal overvoltage clamping 2 r i = w ;v ds > 30 v 100 - - w r i internal overload protection 3 r is = w ;v ii = 5 v 1 - - k w v ii = 10 v 2 - - k w switching characteristics t mb = 25 ?c; r i = 50 w ; r is = 50 w (see figure 29); resistive load r l = 10 w . for waveforms see figure 28. symbol parameter conditions min. typ. max. unit t d on turn-on delay time v dd = 15 v; v is : 0 v t 10 v - 8 - ns t r rise time - 13 - ns t d off turn-off delay time v dd = 15 v; v is : 10 v t 0 v - 100 - ns t f fall time - 45 - ns capacitances t mb = 25 ?c; f = 1 mhz symbol parameter conditions min. typ. max. unit c iss input capacitance v ds = 25 v; v is = 0 v - 415 600 pf c oss output capacitance v ds = 25 v; v is = 0 v - 275 400 pf c rss reverse transfer capacitance v ds = 25 v; v is = 0 v - 55 80 pf c pso protection supply pin v ps = 10 v - 30 - pf capacitance c fso flag pin capacitance v fs = 10 v; v ps = 0 v - 20 - pf 1 the resistance of the internal transistor which discharges the power mosfet gate capacitance when overload protection operates. the external drive circuit should be such that the input voltage does not exceed v is(to) minimum when the overload protection has operated. refer also to figure for latched input characteristics. 2 applications using a lower value for r is would require external overvoltage protection. 3 for applications requiring a lower value for r i , an external overload protection strategy is possible using the flag pin to `tell' the control circuit to switch off the input. september 1996 5 rev 1.000
philips semiconductors product specification logic level topfet buk114-50l/s smd version of buk104-50l/s flag description truth table the flag pin provides a means to condition description flag detect the presence of the protection supply and indicate the normal normal operation and adequate logic low state of the overload detectors. protection supply voltage the flag is the open drain of an n-mos transistor and requires an over temp. over temperature detected logic high external pull-up resistor 1 . it is suitable for both 5 v and 10 v logic. flag may be used to implement an short circuit overload condition detected logic high external protection strategy 2 for applications which require low input drive impedance. supply fault inadequate protection supply logic high voltage flag characteristics t mb = 25 ?c unless otherwise stated symbol parameter conditions min. typ. max. unit flag `low' normal operation v fs flag voltage i f = 1.6 ma - 0.15 0.4 v i fss flag saturation current v fs = 10 v - 15 - ma flag `high' overload or fault i fs flag leakage current v fs = 10 v - - 10 m a v psf protection supply threshold v ff = 5 v; r f = 3 k w ; voltage buk114-50l 2.5 3.3 4 v BUK114-50S 3.3 4.2 5 v v (cl)fs flag clamping voltage i f = 1 ma; v ps = 0 v 11 13 - v application information r f suitable external pull-up v ff =5 v 1 10 50 k w resistance v ff =10 v 2 20 100 k w 1 even if the flag pin is not used, it is recommended that it is connected to the protection supply via a pull-up resistor. it s hould not be left floating. 2 low pass filtering of the flag signal may be advisable to prevent false tripping. september 1996 6 rev 1.000
philips semiconductors product specification logic level topfet buk114-50l/s smd version of buk104-50l/s fig.4. normalised limiting power dissipation. p d % = 100 p d /p d (25 ?c) = f(t mb ) fig.5. normalised continuous drain current. i d % = 100 i d /i d (25 ?c) = f(t mb ); conditions: v is = 5 v fig.6. safe operating area. t mb = 25 ?c i d & i dm = f(v ds ); i dm single pulse; parameter t p fig.7. transient thermal impedance. z th j-mb = f(t); parameter d = t p /t fig.8. typical output characteristics, t j = 25 ?c. id = f(v ds ); parameter v is ; t p = 250 m s & t p < t d sc fig.9. typical on-state characteristics, t j = 25 ?c. i d = f(v ds ); parameter v is ; t p = 250 m s 0 20 40 60 80 100 120 140 tmb / c pd% normalised power derating 120 110 100 90 80 70 60 50 40 30 20 10 0 1e-07 1e-05 1e-03 1e-01 1e+01 t / s zth / (k/w) 10 1 0.1 0.01 0 0.5 0.2 0.1 0.05 0.02 d = t p t p t t p t d d = buk114-50l/s 0 20 40 60 80 100 120 140 tmb / c id% normalised current derating 120 110 100 90 80 70 60 50 40 30 20 10 0 0 4 8 12 16 20 24 28 32 vds / v id / a buk114-50l/s 50 40 30 20 10 0 vis / v = 10 9 8 7 6 5 4 3 2 1 100 vds / v 100 10 1 0.1 buk114-50l/s 10 id & idm / a dc overload protection characteristics not shown 100 us 1 ms 10 ms 100 ms 10 us tp = rds(on) = vds/id 0 1 2 vds / v id / a buk114-50l/s 20 15 10 5 0 4 5 6 3 10 7 vis / v = september 1996 7 rev 1.000
philips semiconductors product specification logic level topfet buk114-50l/s smd version of buk104-50l/s fig.10. typical on-state resistance, t j = 25 ?c. r ds(on) = f(i d ); parameter v is ; t p = 250 m s fig.11. typical transfer characteristics, t j = 25 ?c. i d = f(v is ) ; conditions: v ds = 10 v; t p = 250 m s fig.12. typical transconductance, t j = 25 ?c. g fs = f(i d ); conditions: v ds = 10 v; t p = 250 m s fig.13. normalised drain-source on-state resistance. a = r ds(on) /r ds(on) 25 ?c = f(t j ); i d = 7.5 a; v is 3 5 v fig.14. typical over temperature protection threshold t j(to) = f(v ps ); conditions: v ds > 0.1 v fig.15. normalised limiting overload dissipation. p dsm % =100 p dsm /p dsm (25 ?c) = f(t mb ) 0 2 4 6 8 10 12 14 16 18 20 id / a rds(on) / mohm buk114-50l/s 150 100 50 0 10 7 6 5 4 vis / v = -60 -40 -20 0 20 40 60 80 100 120 140 tj / c a normalised rds(on) = f(tj) 1.5 1.0 0.5 0 0 2 4 6 8 10 12 vis / v id / a buk114-50l/s 50 40 30 20 10 0 0 2 4 6 8 10 vps / v tj(to) / c buk114-50l/s 230 220 210 200 190 180 170 160 150 BUK114-50S buk114-50l 0 20 40 id / a gfs / s buk114-50l/s 10 9 8 7 6 5 4 3 2 1 0 10 30 50 -60 -40 -20 0 20 40 60 80 100 120 140 tmb / c pdsm% 120 100 80 60 40 20 0 september 1996 8 rev 1.000
philips semiconductors product specification logic level topfet buk114-50l/s smd version of buk104-50l/s fig.16. maximum drain source supply voltage for sc load protection. v ddp(p) = f(v is ); t mb 150 ?c fig.17. minimum protection supply voltage for sc load protection. v psp = f(v is ); t mb 3 25 ?c fig.18. typical overload protection characteristics. t d sc = f(p ds ); conditions: v ps 3 v psp ; v is 3 5 v fig.19. typical overload protection characteristics. conditions: v dd = 13 v; v ps = v psn , v is = 7 v; sc load fig.20. typical overload protection energy, t j = 25 ?c e sc(to) = f(v ps ); conditions: v ds = 13 v, parameter v is fig.21. typical clamping characteristics, 25 ?c. i d = f(v ds ); conditions: r is = 100 w ; t p 50 m s 0 2 4 6 8 10 vis / v vddp(p) / v buk114-50l/s 50 40 30 20 10 0 max -60 -20 20 60 100 140 180 220 tmb / c buk114-50l/s 0.5 0 energy / j time / ms tj(to) energy & time 0.4 0.3 0.2 0.1 0 2 4 6 8 10 vis / v vpsp / v buk114-50l/s 10 8 6 4 2 0 min buk114-50l BUK114-50S 0 2 4 6 8 10 vps / v esc(to) / j buk114-50l/s 0.4 0.3 0.2 0.1 0 buk114-50l BUK114-50S vis / v = 5 10 5 10 0.1 1 10 power / kw time / ms buk114-50l/s 10 1 0.1 pdsm 50 60 70 buk114-50l/s vds / v id / a 20 15 10 5 0 typ. september 1996 9 rev 1.000
philips semiconductors product specification logic level topfet buk114-50l/s smd version of buk104-50l/s fig.22. input threshold voltage. v is(to) = f(t j ); conditions: i d = 1 ma; v ds = 5 v fig.23. typical dc protection supply characteristics. i ps = f(v ps ); normal or overload operation; t j = 25 ?c fig.24. typical latched input characteristics, 25 ?c. i isl = f(v is ); after overload protection latched fig.25. typical reverse diode current, t j = 25 ?c. i s = f(v sds ); conditions: v is = 0 v; t p = 250 m s fig.26. normalised limiting clamping energy. e dsm % = f(t mb ); conditions: i d = 15 a fig.27. clamping energy test circuit, r is = 100 w . -60 -40 -20 0 20 40 60 80 100 120 140 tj / c vis(to) / v 2 1 0 max. typ. min. 0 0.5 1 vsd / v is / a buk114-50l/s 20 15 10 5 0 1.5 0 2 4 6 8 10 12 14 buk114-50l/s vps / v ips / ma 1.0 0.5 0 0 20 40 60 80 100 120 140 tmb / c edsm% 120 110 100 90 80 70 60 50 40 30 20 10 0 0 2 4 6 8 10 vis / v iisl / ma buk114-50l/s 100 50 0 4 5 6 7 8 9 vps / v = 11 150 10 l d.u.t. vdd ri = ris r 01 vds -id/100 + - shunt vis 0 id 0 vds 0 vdd v(cl)dsr d s i topfet p f p rf vps + e dsm = 0.5 li d 2 v ( cl ) dsr /( v ( cl ) dsr - v dd ) september 1996 10 rev 1.000
philips semiconductors product specification logic level topfet buk114-50l/s smd version of buk104-50l/s fig.28. typical resistive load switching waveforms r i = r is = 50 w ; r l = 10 w ; v dd = 15 v; t j = 25 ?c fig.29. external input resistances r i and r is , generator voltage v ii and input voltage v is . fig.30. typical capacitances, c iss , c oss , c rss . c = f(v ds ); conditions: v is = 0 v; f = 1 mhz fig.31. typical off-state leakage current. i dsr = f(t j ); conditions: v ds = 40 v; r is = 100 w . fig.32. normalised protection supply current. i ps /i ps 25 ?c = f(t j ); v ps = v psn 0 0.5 1 time / us vis / v & vds / v buk114-50l/s 15 10 5 0 vds vis 0 20 40 60 80 100 120 140 tj / c idsr 1 ma 100 ua 10 ua 1 ua 100 na typ. d s i topfet p f p vii ri ris vis -60 -20 20 60 100 140 180 tj / c ips normalised to 25 c 1.5 1 0.5 0 20 40 vds / v capacitance / pf buk114-50l/s 10000 1000 100 10 50 30 10 ciss coss crss september 1996 11 rev 1.000
philips semiconductors product specification logic level topfet buk114-50l/s smd version of buk104-50l/s mechanical data dimensions in mm net mass: 1.5 g fig.33. sot426 mounting base connected to centre pin (cropped short) mounting instructions dimensions in mm fig.34. sot426 soldering pattern for surface mounting. 10.3 max 11 max 15.4 2.5 0.5 1.4 max 4.5 max 0.85 max (x4) 3.4 3.4 1.7 1.7 11.5 9.0 3.8 1.3 (x4) 1.7 3.4 1.7 17.5 september 1996 12 rev 1.000
philips semiconductors product specification logic level topfet buk114-50l/s smd version of buk104-50l/s definitions data sheet status objective specification this data sheet contains target or goal specifications for product development. preliminary specification this data sheet contains preliminary data; supplementary data may be published later. product specification this data sheet contains final product specifications. limiting values limiting values are given in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of this specification is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the specification. philips electronics n.v. 1996 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. life support applications these products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. september 1996 13 rev 1.000

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